A Fast-Transient Responses Power-efficiency LDO Regulator with Transient-current Enhanced Buffer

Abstract In this paper, we introduce a Low-Dropout (LDO) Regulator that features transient-current enhanced buffer, providing fast transient responses and high-power efficiency. The which incorporates an AC-coupled network high-gain stage, enhances the load response by boosting charging or discharging current to gate capacitor of power transistor, without consuming extra under varying conditions. LDO was designed using standard 65 nm CMOS process has capacitance 100 pF on-chip compensation only 2.7 pF. Simulation results reveal low static 20 μA maximum capacity 200 mA. When output switches from light heavy mA within 1 μs, undershoot voltage is 53 mV time 1.34 μs. Conversely, when switching load, overshoot 51 0.50